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Silicon Labs /EFR32ZG23B010F512IM48 /RAC_S /RFPATHEN0

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Interpret as RFPATHEN0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disable)LNAMIXEN0 0 (disable_dc)LNAMIXRFATTDCEN0 0 (disable)LNAMIXRFPKDENRF0 0 (disable)SYLODIVRLO0SUBGEN 0 (hpa0_off)TXENHPA0 0 (lpa0_off)TXENLPA0 0 (disable)TXENVMIDHPA0 0 (disable)TXENVMIDLPA0

SYLODIVRLO0SUBGEN=disable, TXENVMIDLPA0=disable, TXENVMIDHPA0=disable, LNAMIXEN0=disable, TXENLPA0=lpa0_off, LNAMIXRFPKDENRF0=disable, LNAMIXRFATTDCEN0=disable_dc, TXENHPA0=hpa0_off

Description

No Description

Fields

LNAMIXEN0

LNAMIXEN0

0 (disable): undefined

1 (enable): undefined
LNAMIXRFATTDCEN0

LNAMIXRFATTDCEN0

0 (disable_dc): undefined

1 (enable_dc): undefined
LNAMIXRFPKDENRF0

LNAMIXRFPKDENRF0

0 (disable): undefined

1 (enable_path0): undefined
SYLODIVRLO0SUBGEN

SYLODIVRLO0SUBGEN

0 (disable): undefined

1 (enable): undefined
TXENHPA0

TXENHPA0

0 (hpa0_off): undefined

1 (hpa0_on): undefined
TXENLPA0

TXENLPA0

0 (lpa0_off): undefined

1 (lpa0_on): undefined
TXENVMIDHPA0

TXENVMIDHPA0

0 (disable): undefined

1 (enable): undefined
TXENVMIDLPA0

TXENVMIDLPA0

0 (disable): undefined

1 (enable): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data